Dear all, we have been designing a bootstrap switch module on GF180, but we have encountered some issues along the way. I hope to find an answer here, we would really appreciate it. The switch is indeed working, but not as good as it should. It is worth noting that the signal is not being followed, having a voltage difference of nearly 8mV. Is this something I should expect? Or is it something that shouldn't be happening? One of the biggest problems is the charge profile given by the RC circuit formed by the output stage, and the compensation capacitor C1. This simulation has an input signal with a frequency of 1MHz, but it should be working well at 2MHz. I have seen various designs that use a charge pump to make this design faster, so I was thinking that the lack of it in the design may explain the slow RC profile. I really don't know how should I dimension the capacitor C1, or the output transistor M1, as it doesn't make any evident changes. You may find attached the simulation files on the message, as well as some pictures that illustrate the problem.

Switch clock signals should be non-overlapping. https://athena.ecs.csus.edu/~pheedley/ADC_team_docs/ADC1_clkgen_PDR.pdf

v=i*r and i=C*dv/dt. This is why you see a voltage drop across the switch.

Thank you for your answer. Does anyone know why does the voltage drop when it changes to hold mode? We were thinking with @Vicente Osorio that it may have something to do with the charge sharing due to the parasitic capacitance in M1

Charge injection, perhaps. https://e2e.ti.com/support/switches-multiplexers-group/switches-multiplexers/f/switches-multiplexers-forum/1114640/faq-what-is-charge-injection