@권미정 The 4 devices you’re seeing in the extracted layout are pcells. For example, this subckt

sky130_fd_pr__nfet_01v8_YCY3T5

is not a mosfet, but a subckt containing 4 mosfets. At the parent hierarchy, these are probably connected in parallel, but at this level, there are separate ports for each source/drain. I suspect the problem might come from a missing setup file when executing netgen. I suggest

netgen "tah.mag.spice.txt tah" "tah.sch.spice.txt tah" $PDK_ROOT/$PDK/libs.tech/netgen/${PDK}_setup.tcl

If you can share your

comp.out

file, I might be able to offer more suggestions.

@Mitch Bailey Thank you for your suggestions. I shared my comp.out file. I've additionally captured my netgen screen. The files I attached on Slack were renamed for convenience, but the actual files are 'hgu_tah.sch.spice' for the schematic's spice and 'hgu_tah.spice' for the layout's spice. This shows the screen when running netgen. Thank you."

The messages displayed look unusual. Could you share your

/foss/pdks/sky130A/libs.tech/netgen/sky130A_setup.tcl

file? It may have been overwritten.

Wow, surprisingly, when I tried opening the .tcl file, there was nothing inside. I'm not sure why that happened, but after adding the content again, I was able to perform LVS successfully. Thank you so much for your help. 😂