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<@U03J83W53GT> ~Instead of~
```	"FP_PDN_MACRO_HOOKS": "lane0 vdda1 GND_GPIO vdda1 GND_GPIO",```
~you probably want~
```	"FP_PDN_MACRO_HOOKS": "lane0 vdda1 GND_GPIO vssa1 GND_GPIO",```
magic adds `_uq?` suffices to nets that have the same name but are not connected.

~Try fixing `FP_PDN_MACRO_HOOKS` and let us know if you have other problems.~

Please ignore this momentary lapse of reason.

bitsixtyfour_EESPFAL_switch_2.bb.v

blackbox_test_5.v

11-global.odb

27-write_powered_def.log

Just to double check in the top verilog file, I have
```module blackbox_test_5(
`ifdef USE_POWER_PINS	
	inout vdda1,
	inout GND_GPIO_top,
`endif
.
.
.
bitsixtyfour_EESPFAL_switch_2 lane0 (
`ifdef USE_POWER_PINS	
	.vdda1(vdda1), 
	.GND_GPIO(GND_GPIO_top),
`endif```
Based on the top verilog file and the macro's pins I should be doing the following `"FP_PDN_MACRO_HOOKS": "lane0 vdda1 GND_GPIO_top vdda1 GND_GPIO"` .  But openlane is saying it can't find the power pins.
Looking at the `11-global.odb` , should I define the pins out of the way for the pdn lines?

errors.log

image.png

I tried assigning vdda1_top within the top verilog file, and flipped the pdn_macro_hooks order to the following`"FP_PDN_MACRO_HOOKS": "lane0 vdda1 GND_GPIO vdda1_top GND_GPIO_top"` . I'm getting stuck on Streaming out GDSII with Klayout. Please find the error.log in the attachment.

<@U03J83W53GT> I apologize. Looks like you had things right the first time.
```&lt;instance_name&gt; &lt;vdd_net&gt; &lt;gnd_net&gt; &lt;vdd_pin&gt; &lt;gnd_pin&gt;```
So
```	"VDD_NETS": "vdda1",
	"GND_NETS": "GND_GPIO",
	"SYNTH_USE_PG_PINS_DEFINES": "USE_POWER_PINS",
	"FP_PDN_MACRO_HOOKS": "lane0 vdda1 GND_GPIO vdda1 GND_GPIO",```
should be good.

Check out the vdda1 text in your design to see if there are multiple texts that aren’t connected. If your macro is close to a border, there may be met5 that is not connected but has the same label. (I have seen  multiple texts that are connected, but still get the `_uq?` suffix. This shouldn’t be and I believe <@U016EM8L91B> fixed it.  What version of magic are you using?)

i'm using magic 8.3.427
edit: I will check the gds that's saved using magic for any missing vdda1 pins

I have found 2 vdda1 labels that I missed during cleaning up. Will regenerate lef file and reuse the original `PDN_MACRO_HOOKS` line and see what happens