Hi all, I'm attempting to blackbox a 64 bit width custom layout. I'm getting a lvs error on the vdda1 power pin, concerned about the die area size to incorporate the macro. The macro it self is 70umx2000um and I have the die area at 1000um x 3000um to avoid routing congestion at the moment. It looks like openlane is assigning a different name to the power pin on the top level of the hierarchy. I'm not certain what can need to be changed to fix this issue and what is a better way make the die area smaller and also avoid congestion.