ANKI REDDY SAI PRAVEEN
10/04/2023, 2:05 AMTim Edwards
10/04/2023, 6:25 PMmarch
is rv32i
). Does that answer your question?ANKI REDDY SAI PRAVEEN
10/04/2023, 7:06 PMmarch is rv32i
. Lets say I instantiated SRAM in user project area and and have written some data in SRAM . Now I want core to compute Some addition operation on Data that is already in SRAM and I want to store that result in SRAM. Now How to capture result from CPU core.Tim Edwards
10/05/2023, 6:30 PM-march
is a compiler option to gcc, telling the compiler what the target architecture is; rv32i
is the designation of a RISC-V architecture. rv
means RISC-V; 32
means a 32-bit architecture, and the letters after that are processor options. i
is for integer arithmetic, m
is for hardware multiplier (and possibly divider), c
is for compressed instructions, and so on.
But I think your question has a different answer. If you have instantiated an additional SRAM in the user project and you want to reach it from the processor, then you will want to create a wishbone interface; that interface would respond to address 0x30000000
which is the address range (to 0x3fffffff
) of the user project memory map. The SRAM address would be the lower bits of the wishbone address. This can be simply an extension of the processor RAM, and you can create a compiler file sections.lds
that tells the gcc compiler that there is additional memory available at that address. Or you can make specific reads and writes to addresses in that space from a program.ANKI REDDY SAI PRAVEEN
10/05/2023, 8:24 PMANKI REDDY SAI PRAVEEN
10/05/2023, 8:32 PMTim Edwards
10/05/2023, 8:39 PMANKI REDDY SAI PRAVEEN
10/06/2023, 12:24 AM