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# efablesss
samarth jain
09/27/2023, 5:23 AM@Mitch Bailey @Tim Edwards @Matt Venn @mkk I wanted to incorporate sram in my chip design, but as per document it has little info and asks to contact efabless regarding it.As the current caraval also dont have SPI, how can we increase on chip sram size?
m
Mitch Bailey
09/27/2023, 5:56 AMPrevious versions of caravel did include an OpenRAM macro in the management area. The document you quoted seems do be indicating that if you wanted more sram in the management area, you should contact efabless and they would recreate the management area with a bigger macro - something that I have not seen.
The current version of caravel does not use OpeRAM macros, so any OpenRAM memory you need should probably be added in the user area.
s
samarth jain
09/27/2023, 6:04 AMHow about using spi to interface external ram? Is there any provision in nov tapeout? I see there is something like house keeping spi and qspi(I was informed aspi might not be present)
samarth jain
09/27/2023, 7:07 AMimage.png
samarth jain
09/27/2023, 7:08 AMAlso is 1K sram is still present in management area which is shown in document?
m
Mitch Bailey
09/27/2023, 10:00 AMLooks like there are 3 128K blocks in the current management area. @mshalan who is the person to verify this?
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