when i am generating a memory macro with even number of columns , an extra pin named SPARE_WEN0 is generated . in the attached code , in the main subcircuit spare_wen0 is present . whereas in instantiated subcircuit Xspare_wen_dff0 , spare_wen0[0] is present. is it a mistake?

Hi Abhishek, Unfortunately there's no documentation on this. The spare rows are added to keep the number of rows and columns a multiple of 2 in the single port memories. An extra is used for the replica timing so this offsets that. These spares columns can be written with that write enable. The spare rows can be written by using the extra MSB of the address and all 0s for the other address bits.

@Matthew Guthaus Thank you