to mark a subcircuit as blackbox in netgen lvs setup.tcl script and I can confirm with
puts [model *cell_name*]
that the model type for cell_name changes from subcircuit to blackbox. But then in the lvs report I see it is still comparing them as subcircuits (and thus failing lvs because they don't match, hench why I want to make them black box)... I'm not sure I understand how to achieve the blackbox behavior I want.
Furthermore (maybe related?): the above describes the behavior after setting
model blackbox on
, when I set
model blackbox off
the behavior is the same except that
model *cell_name*
returns "module" which does not appear to be a valid model type according to the documentation. Nor is that difference of behavior documented in the section on model blackbox on|off in the documentation at http://opencircuitdesign.com/netgen/ maybe I'm looking in the wrong place?
m
Mitch Bailey
06/05/2023, 12:35 AM
@Sam Crow Thanks for articulating the problem.
netgen normally flattens unmatched circuits, but you can override this behavior with the
-noflatten=<no_flatten_file>
option to the lvs command. Include all the cell names that you don’t want to flatten in the
<no_flatten_file>
.
Mitch Bailey
06/05/2023, 12:52 AM
Note: this may still result in overall mismatches if the port names in the non-flatten cells do not match.
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