#241 Hierarchical connectivity not extracting through levels with no connections to unlabeled nets Issue created by d-m-bailey Seen on

slot-012

of chipignite

2206q_b

. • Lower levels do not have text or pins. • nwell is extracted as connected to

#m4_x_y

(autogenerated name) at level 3 (not a port). • Level 2 has no text or pins connecting to any layers on that net. • Level 1 has a VDD metal2 pin over the metal2 that is 2 levels down, but this connectivity is not extracted. I can create a private test case. RTimothyEdwards/magic