The Logic analyzer pins in mpw2 have been holding me back from testing a lot of parts, so, please help me with my current understanding if you have any idea.
I am not able to make LA pins to send data from CPU to user project area. Im not sure what Im missing. I need to send data from processor to User project. Like turn on LA_DATA_OUT (reg_laX_data) 20:24 to 1 but I tried all permutations and combinations with the reg_laX_iena nothing works.
My current understanding,
reg_laX_oenb -> means nothing if we didnt connect it to anything in your design.
reg_laX_iena -> turning on this means giving instructions to the CPU to receive data from that pin.
And in the firmware reg_la0_data [31:0] corresponds to la_data_out[31:0] in the caravel/caravan layout frame and so on for other bits.
So when we want to configure the LA pins to send data from CPU to user project, one should make the reg_laX_iena for that pin to be 0 and make the reg_laX_data for that pin to be 1?