Tim Edwards04/14/2023, 10:18 PM
registers are driven by a state machine in the housekeeping module and are programmed in four passes (one per byte). That means that its maximum rate is going to be something below 1MHz (I forget how many clock cycles are in the state machine; I'd need to look it up). If you try to drive the GPIO faster than that from the management SoC, the behavior will be a much slower pulse, since the housekeeping will hold the wishbone acknowledge until it has finished the write cycle.
Stanley Lin04/14/2023, 10:24 PM
reg_mprj_datal = 0x100 delay(1) reg_mprj_datal = 0x300 delay(1) reg_mprj_datal = 0x500
proppy04/18/2023, 1:00 AM