Can lvs test fail even though the number of net and fanout count are all the same? This is the log of the lvs test that I turned using netgen. If you look at it, it says the netlists don't match, but you can't find anything different in the fragment flow other than net names.

Might be a good question on #lvs. Yes, netgen will detect a mismatch if the nand inputs are in different order even though device and net counts and logical operation are the same.

@HyungJoo Park: Sometimes swapping inputs will produce symmetries that don't show up clearly in the output. Here it looks like there's a NAND3 gate in a 4-bit decoder. Its inputs could be swapped between the two netlists without affecting the decoder function, but it could show up as an error in LVS. Adding

debug on

to the setup file will produce output that won't be ambiguous, but there will be a lot more output to sort through. Possibly you could use the

permute

command on the NAND gate pins.