Vicente Osorio
03/24/2023, 1:34 PMdw_2450_2450#
and dw_2450_15850#
. I thought that labeling both PWELL and DNWELL for NMOS would do the job, but nothing changed. A third node, called a_400_27200#
, appears for connecting capacitors in between voltage source connections. I suppose it may be the substrate voltage, that sometimes MAGIC generates as VSUBS, but I don't know how to label substrate as it doesn't have a layer to connect to.
I've attached the layout, SPICE extracted netlist and the converter schematic with the label names I've used to give some context.
The commands that I used for parasitic extraction are the following
extract all
ext2sim labels on
ext2sim
extresist tolerance 10
extresist
ext2spice lvs
ext2spice cthresh 0
ext2spice extresist on
ext2spice
Hope you can help me identify the origin of this 3 unknown labels.
Best regards,
Vicente Osorio RivasLuis Henrique Rodovalho
03/24/2023, 1:49 PMTim Edwards
03/24/2023, 2:17 PM