@Stefan Schippers Hi Stefan, I am trying to get S-parameters (loss, gain, noise factor) figures from a LNA circuit. This plot is basically magnitude(db) vs frequency. I could not find any command to do that in ngspice. Do you have any idea how to do it?

Stefano: OpenSTA can do power analysis

Hi All. I'm running openlane2 on a basic 4b counter and have encountered an error. In dir ~/mydesigns/counter_4b/, I have created the attached config.json and counter_4b.v files, as per the below link: https://openlane2.readthedocs.io/en/latest/getting_started/newcomers/index.html#configuration The flow errors out with the following: --------------------------------------------------------------------------- [065447] ERROR The following error was encountered while running the flow: main.py:163 OpenROAD.GeneratePDN failed with the following errors: [PDN-0185] Insufficient width (18.86 um) to add straps on layer met4 in grid "stdcell_grid" with total strap width 4.9 um and offset 16.32 um. [065447] ERROR OpenLane will now quit. --------------------------------------------------------------------------- Being a newbie to openlane Im not so good at interpreting these errors yet. It appears to have errored out at step 20 - "20-openroad-generatepdn". Any ideas what it is and how to overcome it? Thanks, Diarmuid

Hi All. I am just looking into the resistor options in SKY130 - the P+ and P- Poly precision resistors. 1.) Both have a 'b' connection to connect the nwell below the resistor (which shields it from substrate noise). Naturally one would connect this to vdd but given that the substrate is vss, it should also be possible to connect this nwell bulk to vss also. I've done this before in a process which allowed it but just want to confirm it is indeed allowed in this process. Can anyone confirm it is? Context of the question is supply rejection as placing the resistor on a vss referred net would favor connecting the bulk to vss also. 2.) Rs of the P+ resistor is 300ohms/sq while that for the P- resistor is 2kohms/sq. This would make the P- resistor more favorable to low power applications w.r.t area. However, Im a little spooked by the below line in the P- resistor documentation: "Electrical and e-test specs are still TBD, once sufficient silicon has been evaluated." Is the P- resistor mature enough to be used or is it still under development? Thanks,

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Hello everyone, when I run qflow on my verilog design it creates a folder named "layout" where you have .gds and .mag files which you can open in magic and view, however when I try to do this then I do not see the standard cell gates and on the console window it says that it is unable to read them, what could be the issue.

Holy cow, these gf180 SRAM are huge compared to the sky130 ones. The pic shows a gf180 256x8 compared to a sky130 256x32 (4x!). Is it the technology or is doing @Matthew Guthaus’s OpenRAM team such a great job ? And rather slow (max frequency >> 5 ns), I remember doing RISC processors in the late 90ies on 180 with TLBs, I$, D$, MMU SRAMs @250MHz (no critics, just technical discussion !).

The xyce simulator is much faster to start a simulation job and do the simulation itself compared to ngspice. Is there a gotcha somewhere, different model or less accuracy? Hspice seems to be as fast as xyce. My comparison is limited with only an inverter and 3-bit DAC. Hspice might still be faster for more demanding circuits. I hope to see the same speedup when testing my 10-bit that took 10 hours with ngspice. BTW the integration with xschem is very convenient, see embedded post

I see. So in theory I should be able to use Xyce to run my multi port sp simulations (but just not be able to use the nice QUCS-S interface for it). (I will test all of these theories and write my experience here, still doing some reading before getting started). Is there a tutorial or document to follow to set up all the PDK and EDA tools nicely? Or are all of them setup individually and manually?

Hello. I'm using xschem with gf180mcu PDK. There are many digital stdcells I can use in xschem with SKY130 PDK. But I couldn't find them in xschem with gf180mcu PDK. Should I manually design latches, flip-flops, etc. to use them? or is there any sources that I can use in xschem? Thank you for reading my question.