@Stefan Schippers I am facing issue in simulating DFF cell from sky130 standard cell library in xschem. Can you please suggest what might be wrong in this testbench.

The xyce simulator is much faster to start a simulation job and do the simulation itself compared to ngspice. Is there a gotcha somewhere, different model or less accuracy? Hspice seems to be as fast as xyce. My comparison is limited with only an inverter and 3-bit DAC. Hspice might still be faster for more demanding circuits. I hope to see the same speedup when testing my 10-bit that took 10 hours with ngspice. BTW the integration with xschem is very convenient, see embedded post

Hey! Seems like there is bug in xschem (or ngspice) using sky130 pdk: If doing a noise simulation (.noise) within placed a nfet_01v8 in xschem and saving data in ngspice using write noiseSim.raw (for example), ngspice crashes and writes an error: "vector @m.xm1.msky130_fd_pr___nfet_01v8[ib] is not available or has zero length. free(): invalid pointer ...". It seems that only nfet01v[id] has data and ngspice can't handle that. A temporary solution would be (for example) instead of write noiseSim.raw: setplot noise1 write noiseSim.raw @m.xm1.msky130_fd_pr__nfet_01v8[id] @r1[i] inoise_spectrum onoise_spectrum set appendwrite setplot noise2 write noiseSim.raw @m.xm1.msky130_fd_pr__nfet_01v8[id] @r1[i] inoise_total onoise_total

How can I use gm/id methodology for sky130 pdk, especially how to get the necessary plots like ft v/s gm and such?

Hi everyone! I'm trying to integrate a large analog macro with gsg pads into the user_project_wrapper. However, when it tries placing the macro, it gives the error that the macro is taller than any row (the macro class used in lef file in this case is CORE, and it's dimensions are 140 um x 400 um). I've tried adding some obstruction layers using GRT_OBS but that doesn't seem to do anything, and I've also tried changing the macro's class from CORE to BLOCK but then it fails while generating the PDN. Does anybody know what variables I need to change to make it go through multiple rows, and prevent PDN and other routing generation steps inside the macro's area? Any help would be appreciated. Thanks!

Hi, I'm trying to generate a custom openram macro for sky130, and I'm getting the familiar

ERROR: file design.py: line 46: Custom cell pin names do not match spice file:

error. The issues and chat history I've searched referencing this indicate the skywater pdk is not installed correctly, however, I ran

make install

, it looked successful, and I have the following files

ls technology/sky130/gds_lib/
sky130_sram_1kbyte_1rw1r_32x256_8.gds  sky130_sram_2kbyte_1rw1r_32x512_8.gds
sky130_sram_1kbyte_1rw1r_8x1024_8.gds  sram_1rw1r_32_256_8_sky130.gds

Hello I a new to openlane and have been trying to install it for a while, after cloning the repo and after I cd into the openlane2 directory i execute the nix-shell which builds to about 90% and then throws a build error, for context i am using Ubuntu in WSL.

Hi, i saw some post on gm/Id method, an IEEE paper for the same https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=535416&tag=1 However, to plot graphs, 1. gm/Id Vs Vgs --> for gate Voltage 2. gm/Id Vs Vdsat --> i.e. VDD (also called as gate overdrive voltage) 3. gm/Id Vs gm/gds --> intresic gain 4. gm/Id Vs Vth ---> threshold voltage 5. gm/Id Vs Id/W ---> Current Density i'm searching for ngspice commands to be used with sky130, from some time. But, with few forms not able to find help. So, can anyone having example for such. It would be great help.

Is there a way to launch the OpenRoad GUI using openlane makefiles so that it includes the STA constraints? (I'm not sure if this is "built in"... I know I could do it through scripting...)

Hi! Can someone please help me with the following?