Hey guys! Do you know which layer is STI in the Magic sky130 layer palette? I can't seem to find an explanation for some of the layers present.

Just ask. I did use some "traditional" names going back to the original SCMOS technology files for magic. STI specifically, though, is not a drawn layer in the SkyWater technology. I am not sure how the STI positions are derived for fabrication, but it should be possible to generate the STI etch positions from diffusion, nwell, etc.

Okay, thank you! I have a specific question about the type of construction that I want to do. If I create a device layout that has a rectangle in the isosubstrate layer and a smaller rectangle of ppolyres on top of it, what will be filled between the two layers during fabrication? Will it be STI? I essentially want to create a ptype poly resistor with a very high breakdown voltage to the substrate.

Typically, breakdown on transistor gates happen at the corner crossing of diffusion and poly. By contrast, poly over field oxide already has a very large breakdown voltage, so unless you are planning to go higher than, say, 50V, I wouldn't get too concerned about it. It won't be STI, though; it will be just plain field oxide under the poly. Nwell under the resistor instead of substrate is probably slightly better, but normally you would do that for noise considerations, not for breakdown.

Got it. Thank you for the reply, Tim. I am targeting a maximum voltage of 100V, hence my concerns with breakdown voltage. I am planning to make polysilicon resistors and polysilicon diodes similar to the figure shown below. Do you think I will be able to make them in this process? They use STI to improve the substrate isolation, and thus help us push breakdown voltage even higher. The polysilicon diode is made with ptype poly, instrisic poly and ntype poly laid out on top of the STI.

You're not going to be able to change the physical makeup of the device. You might try asking @Jennifer Hasler, who has used high voltage programming for floating gates. I know the floating gate programming can be as high as 50V or so, which is why I'm familiar with that range, but I'm unsure of what the upper limit of that is.

Thank you for your help, Tim! I will try to contact this person.