Hi all,
How can I find those 4 mismatches?
I thi...
# openlanee
Emilio Baungarten
03/02/2023, 8:56 PMHi all,
How can I find those 4 mismatches?
I think it may be a vccd and vssd routing problem, I checked my modules but I didn't find any wrong.
✅ 1
Emilio Baungarten
03/02/2023, 9:25 PMWell, I solved this problem, When I looked at the RTL genetared by Openlane some signals are routed to ground. When I check my RTL code I use those variables (wires) but I never declare those variables. I think when the synthesis was done the signals that were not declared were routed to ground and that caused the error in LVS.