Hi @User, Have you had a look at reram? We are currently working on creating a reram cell to replace the DFF/Latch used for the eFPGA configuration bits. So the question is which library is compatible with this reram process (e.g., thicker layer between met1 and met2)? We are using sky130_fd_sc_hd for our design (including the custom multiplexer) but not sure if the p/n-mos transistor from this library can tolerate up to 3V required for reram program/set or not although simulation looks fine? Any thoughts how to integrate and tape it out with current sky130 cells? Thanks