<@U016F6JU0GN> It seems the C program overrides th...
# caravel
j
@User It seems the C program overrides this hardware, so even if the user_proj_example is not enabling output after reset the processor does. See <https:verilog/dv/caravel/user_proj_example/io_ports/io_ports.c|verilog/dv/caravel/user_proj_example/io_ports/io_ports.c>