CMOS (PMOS+NMOS) implementation of a NAND gate & glass Gate Array IC masks. For information on the electronics see blog post https://mrmcsoftware.wordpress.com/2014/04/15/the-electronics-behind-my-raytraced-nand-gate-ic-mask-layout-using-a-gate-array… or videos on that page. @Peter_shirley @Atrix256