@User @User I apologize in advance if this is a non-issue. I don't have magic setup were I can take a quick look at the layout. From the device level LVS, it appears that there is a power short in the

decap

cells of

sky130_fd_sc_hvl

Here's a sample netlist from the spice library.

.subckt sky130_fd_sc_hvl__decap_8 VGND VNB VPB VPWR
X0 VGND VPWR VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=1e+06u         
X1 VPWR VGND VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1e+06u l=1e+06u         
X2 VPWR VGND VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1e+06u l=1e+06u
X3 VGND VPWR VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=1e+06u         
.ends

And here's the netlist from the extracted GDS (

mgmt_protect_hv.gds

from caravel)

.subckt sky130_fd_sc_hvl__decap_8 VNB VGND VPWR VPB                  
X0 VGND VPWR VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=1e+06u
X1 VNB VGND VPWR VPB sky130_fd_pr__pfet_20v0 w=1e+06u l=1e+06u            
X2 VNB VGND VPWR VPB sky130_fd_pr__pfet_20v0 w=1e+06u l=1e+06u
X3 VGND VPWR VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=1e+06u
.ends

1. You'll notice that the pfet models are different. 5V vs 20V 2. The power short shows up on the pfets. Instead of the source and drain both being connected to VPWR, one is connected to VNB, which is VGND and since the gate is tied low, VPWR shorts to VGND. Could this be a rule problem?