@User one interesting consideration (so, Thank you for doing this design!!) is that this circuit is quite small, some combinatorial cells + latches, it uses 394 transistors, nevertheless ngspice requires 2.2GB of RAM to just load the circuit. the expanded listing (listing expand > file) produces a 292MB file, really too big for a 393 transistor netlist. It appears all models (including all binnings for W and L) are loaded in memory. This is a serious problem. I have successfully simulated a 8Kx16 bit ROM design (14K mos transistors) with ngspice using a simpler set of models, I remember @User wrote some time ago about this loading of unused models, if i remember correctly... I don't know how to mitigate this problem... as it runs right now it is pretty unuseable for bigger designs, and this is sad since the computational engine of ngspice is capable.