@User: It's not because they're drawn "flawed", it's because they're not intended to be used in isolation. The nwell and substrate in all the standard cells are not connected to the power and ground rails, respectively, so magic will flag errors for the nwell not having a tap, and the pFET and nFET devices not being near a tap. If you put these cells in a larger layout and connect a tap cell to them (e.g., the tapvpwrvgnd), then the well and substrate will be contacted and the errors will disappear.