when I add my circuit in

user_project_wrapper.gds

and generate gds I see a lot of CIF erros in the feedback. All the errors look like this.

box 215537 463025 461396 572838

feedback add "CIF error in cell user_project_wrapper, layer PPLUS: parent and child disagree on CIF" pale

Any idea how those can be fixed or need to be fixed at all?