In it's third consecutive year, VSDOpen2020 is bigger and better than last 2 years. This time, we have 3-days of tutorials on RISC-V, CAD and Physical Design using OpenLANE and google+sky130. So good opportunity to learn all above topics in a day workshop, beautifully embedded with online cloud labs on VSD-IAT and Makerchip platform. Also, exciting keynotes by Jan Rabaey, Naveed Sherwani and Mike Wishart Some more excitement, out of a batch of 140 interns who applied this year for VSD Research IP design internship, top 5 VSD interns have been selected by our internal jury to present their open-source analog IP's and RISC-V learning IP's. All IP's are built by students from Indian universities and are built using open-source, which unknowingly and partially executes India's initiative of ESDM program and DARPA's initiative of open-source POSH program. This brings next level of excitement where Ms. Sunita Verma, Senior Director, MeiTY will help us understand the exact vision of ESDM We are really excited to showcase all work in 4-day event of VSDOpen2020 from 7thOct - 10thOct i*n collaboration with The ESD Alliance, a SEMI Technology Community, and the SEMI Foundation*. Below link has all details. Students - Feel free to share with your network, as this time, the event is for students, of students and by students https://www.vlsisystemdesign.com/2020-2/ All the best and happy learning