@Everyone - 10th and Final mile-stone in field of open-source analog Research IP design - A full-fledged (and the toughest of all) 10-bit ADC. Detailed characterization results, circuit, layout can be seen below. https://github.com/ADC-TEAM2020/avsdadc_3v3 This block was the toughest as it had SAR, DAC, Comparator, S/H and clock divider. The team who build this are college students from Universities and had joined VSD online 8-week research IP design internship program Look at the combination - 8-weeks, 7th semester undergrad students from university, open-source pdk's/tools, 5-day VSD SoC design workshop was the only training they received and ADC industry grade specs received from VSD - That's all ingredients of a successful 10-week VLSI technical program Also, hat's off to all other students who built the rest IP's using same above ingredients. Details can be found below https://www.vlsisystemdesign.com/ip/ To all my friends and mentors in VLSI industry, time to take a back-seat and encourage more of such activities within the community. All the best and happy learning