@User while implementing xschem symbols for varactors and doing some tests i see in documentation that (accumulation) capacitance for a 5/5 device is nominal 20pF . This is clearly impossible for 4.1nm oxide gates that correspond to ~8.3fF/um2. Simulation shows that a 5/5 LV nmos has capacitance close to 0.19pF (excluding the transition region from accumulation to inversion), this is what i expected. Moreover the varactor model yields strange results (goes in opposite direction!!). Reason is probably because cap_var_lvt uses a 'charge conservation' device description for the capacitor:

Cxxx node1 node2 q='expression',

this is however HSPICE-specific and undocumented (and i believe not working, at least not as it should) in ngspice.