Hi, @User after some rounds of trials Dietmar Warning (ngspice devs team) managed to implement the 'charge conservation formulation' for capacitors ( Cxxx n1 n2 q={expr} ) that is used for example in sky130 varactor models. The simulation results are in line with the expectations (taking as a reference the capacitance calculated as W*L*eps/tox, and also cimparing with same sized gate capacitance of a lvt nmos transistor). The capacitance vs vg is shown below for a 5 x 5 device (expected C = ~200fF). My question is if it is correct to have the capacitance drop at negative voltages (this is correct for pure accumulation devices).