VSDOpen announces new technologies for effective VLSI skill development Registration closes in 24hrs https://www.vlsisystemdesign.com/vsdopen2022/ If you have been following VSDOpen for the last 5-years, the theme has been maintained - What VSD did last year and what VSD will do next year Every year, every company looks for pointers to technologies which prove to be useful for next-gen VLSI design, better PPA, tape-outs and learning. Almost all of them are cutting-edge and have a beautiful interface to start with. This year, VSD is very delighted to work with our partners on 4 upcoming technologies 1) UpTickPro by Vyoma Systems - Lavanya J, who is the CEO and Founder of Vyoma systems, has close to 11+ years of experience with IBM, ARM & Rambus, with an MS from IIT Madras. She was a part of the very popular RISC-V-based Shakti project under Prof. Kamakoti. Recently, we did a design verification hackathon using UpTickPro and we received an unbelievable 2300+ registrations, who eventually became users of UpTickPro. Glad to have Lavanya as a VSDOpen2022 speaker 2) OpenFPGA by the University of Utah - Prof. Nanditha Rao, along with Prof. Xifan TANG, went through a series of iterations and helped VSD to launch the first cloud-based hands-on FPGA workshop using OpenFPGA. This workshop was carefully designed to incorporate benchmarking results from proprietary FPGA tools and OpenFPGA. Not just that, Prof. Nanditha went ahead to build a STEM education process with an OpenFPGA workshop as a test case, which has trained close to 200+ users in the last 6 months. Glad to have Prof. Nanditha as a VSDOpen2022 speaker 3) OpenFASoC by the University of Michigan - Tim Ansell introduced us to Mehdi Saligane, who is an Assistant Research Scientist, and an Intermittent Lecturer at the University of Michigan. He has been working on interesting automated analog generators which are built on top of OpenROAD and other open-source tools. VSD is very much interested in analog and we are looking forward to introducing many programs and tapeouts using OpenFASoC as high-performance analog layouts have always been challenging. Stay tuned to our website for more statistics about OpenFASoC. Glad to have Mehdi as a VSDOpen2022 speaker 4) BigSpicy by the University of California, Berkeley - This one is quite interesting and very close to our hearts. Tim Ansell, again, introduced us to Arya Reais-Parsi, who is a PhD Candidate at the University of California, Berkeley. While I was working at Cadence as an application engineer for the Tempus STA tool, the thought of having a complete SPICE simulation for the whole chip for accuracy purposes had always crossed my mind. But during those years, we never got a fast SPICE simulator and neither a framework which supported this. Finally, when we heard about BigSpicy, the hidden thought came back and we are glad to partner with Arya on this project. Entire statistics are yet to be finalized. But glad to have Arya as a VSDOpen2022 speaker As we mentioned earlier, VSDOpen is all about Ground-level efforts to boost Semiconductor tape-outs and Skill Development