Hi @User generally speaking IC tools don't have tightly coupled schematic and layouts during layout designs like you may be used to in PCB software. Noteable exception is Cadence Layout XL but that's $$$. Tanner also has some linking but it's not great. But anyway, for what your using the two are completely uncoupled. The flow is make your schematic, run sims. Then use that as a reference to make your layout. When you think they match you extract the layout to a netlist and use an LVS (Layout vs Schematic) tool like netgen to compare the two netlists. Then you spend many hours slowly dying internally until the two netlists match. And then you're done!