@User, yes i agree. The rf subcircuit is just a wrapper with a bsim mos into it. Don't know if the bsim parameters alone are enough to describe all RF parasitic effects. for the layout i don't know, capacitance on source side usually do not matter much as long as it is tied to a supply. If transistor is used as a switch or pass gate, then well, that's another story. I don't know though what's the best tradeoff between minimizing series resistances or minimizing coupling capacitances. For the dummy poly grounded gates, i don't know the reason either. May be some mobility advantages due to silicon strain? Anyway layout designs like this one (excluding dummy polys) are quite common in literature...