Thank you <@U016H5X1K62>. I was not aware of that ...
# analog-design
t
Thank you @User. I was not aware of that but it makes sense. The model I'm using is the
pnp_05v5_W0p68L0p68
which I assume is calling up the model in
sky130_fd_pr__pnp_05v5_W0p68L0p68.model.spice
. Should I be using a different one? Also, is the ideality factor something which varies spacialy across the wafer or in some other way? And what would be the best way to account for its variation, would I do it by trimming the resistor connected to
ve
on the right branch?