A full R-C extraction is not simulatable until you replace the "error" nodes in the netlist with the appropriate power or ground net. Long ago, magic didn't extract 4th terminals of devices and used global power and ground net names. I fixed that in the extraction, but the full R-C parasitic extraction code was never rewritten to take advantage of that; it unfortunately wants to write connectivity information and read it back in via the ".sim" file format, which is for a switch-level simulator (IRSIM) that does not even care about substrates and wells, and so just represents all transistors as 3-terminal devices. So the well and substrate nodes get completely obliterated. I need to get it to stop using the ".sim" format and just pull all information from the ".ext" format files, which have everything needed for the parasitic extraction to understand the circuit connectivity without losing information about the wells and substrate.