@User I am getting results that can not be correct when simulating the RC extraction netlist (but it does seem to be simulating). I am getting some weird error messages. The first is that it can not open .sim files for my some submodules, even though I have flattened the design.

exttosim finished.
Cannot open file cascode_bias.sim
Cannot open file folded_cascode_p_in.sim

The second is that it is flagging a single poly contact as being too small to extract despite it being no different than all other gate contacts on the generated FETs

Warning: polycont at 13893 -3555 smaller than extract section allows

It is also complaining about missing SD connections, but I think that is just due to dummy / series fets or something?

missing SD connection