Aireen Amir Jalal11/13/2020, 7:25 AM
I understand the fact here that the
\DOBUF' is not part of the design.
module is instantiated here so, I tried adding the path to the verilog file containing this module as follows:
, but as this verilog file itself contains multiple `include statements the flow didn't proceed further and gave an error as shown in third image. Can you please guide on how to proceed further. Thanks