#123 ERROR: Can't open ABC output file `/tmp/yosys-abc-usQczk/output.blif'. Issue opened by SweeperAA Using openlane mpw-one-a branch and in the early stages of the flow for my design, I get the following error:

22.1.1. Executing ABC.
ERROR: Can't open ABC output file `/tmp/yosys-abc-usQczk/output.blif'.
[ERROR]: during executing: "yosys -c /openLANE_flow/scripts/synth.tcl -l /project/openlane/decred_top/runs/decred_top/logs/synthesis/yosys.log |& tee >&@stdout"
[ERROR]: Exit code: 1
[ERROR]: Last 10 lines:
child process exited abnormally

[ERROR]: Please check yosys  log file
[ERROR]: Dumping to /project/openlane/decred_top/runs/decred_top/error.log

    while executing
"try_catch [get_yosys_bin]  -c $::env(SYNTH_SCRIPT)  -l $::env(yosys_log_file_tag).log  |& tee $::env(TERMINAL_OUTPUT)"
    (procedure "run_yosys" line 22)
    invoked from within
"run_yosys"
    (procedure "run_synthesis" line 4)
    invoked from within
"run_synthesis"
    (procedure "run_non_interactive_mode" line 11)
    invoked from within
"run_non_interactive_mode {*}$argv"
    invoked from within
"if { [info exists flags_map(-interactive)] || [info exists flags_map(-it)] } {
	puts_info "Running interactively"
	if { [info exists arg_values(-file)..."
    (file "/openLANE_flow/flow.tcl" line 162)
Makefile:25: recipe for target 'decred_top' failed
make: *** [decred_top] Error 1

This error occurs on the full up version of my design that as about 282K cells (as reported just before the "Executing ABC pass (technology mapping using ABC)" step). If I reduce my design to 107K cells, it still occurs. Only if I reduce the design down to 72K cells, I don't get this error. I don't believe this is a RAM limitation as the memory usage was very low during this part of the process (and I have 24G of RAM). Repo is at: https://github.com/SweeperAA/skywater130_decred_miner efabless/openlane