GitHub
11/01/2021, 2:20 PM[INFO]: current step index: 38
[INFO]: Skipping CVC
[INFO]: Saving Magic Views in /project
[INFO]: Calculating Runtime From the Start...
[INFO]: flow completed for foo/2021.11.01_11.51.41 in 2h3m18s
[INFO]: Saving Runtime Environment
[INFO]: Generating Final Summary Report...
[INFO]: Design Name: foo
Run Directory: /project/openlane/foo/runs/foo
----------------------------------------
Magic DRC Summary:
Source: /project/openlane/foo/runs/foo/reports/magic/36-magic.drc
Violation Message "Metal1 width < 0.14um (met1.1) "found 63 Times.
Violation Message "Local interconnect minimum area < 0.0561um^2 (li.6) "found 451096 Times.
Total Magic DRC violations is 451159
----------------------------------------
LVS Summary:
Source: /project/openlane/foo/runs/foo/results/lvs/foo.lvs_parsed.lef.log
LVS reports no net, device, pin, or property mismatches.
Total errors = 0
----------------------------------------
Antenna Summary:
Source: /project/openlane/foo/runs/foo/reports/routing/38-antenna.rpt
Number of pins violated: 275
Number of nets violated: 212
[INFO]: check full report here: /project/openlane/foo/runs/foo/reports/final_summary_report.csv
[WARNING]: There are max slew violations in the design at the typical corner. Please refer to /project/openlane/foo/runs/foo/reports/routing/23-spef_extraction_sta.slew.rpt
[ERROR]: There are hold violations in the design at the typical corner. Please refer to /project/openlane/foo/runs/foo/reports/routing/23-spef_extraction_sta.min.rpt.
Is there any configuration variable to add into config.tcl to fix these violations?
The-OpenROAD-Project/OpenLane