#692 Efabless Openlane PL_TIME_DRIVEN=1 mode is broken (Script: or_replace.tcl) New issue created by dineshannayya Time Driven Placement mode is broken in openlane setup (script: or_replace.tcl) Run fails with below error message, [INFO ODB-0134] Finished DEF file: input/6-pdn.def [ERROR STA-0573] 'sky130_fd_sc_hd__inv_1' not found. Error: 3-verilog2def.sdc, 153 STA-0573 Tools say's not able to find the sky130_fd_sc_hd__inv_1 in trimmed.lib and inside trimmed.lib this Buffer is commented /* removed sky130_fd_sc_hd__inv_1 */ This issue is easily reproducible with just adding PL_TIME_DRIVEN=1 in any Efabless example project Example: exp12.tar.gz Also replacing trimmed.lib with sky130_fd_sc_hd__tt_025C_1v80.lib also fails in next stage [NesterovSolve] Iter: 1 overflow: 0.858753 HPWL: 21743281 [INFO GPL-0100] worst slack 8.59e-09 [INFO GPL-0103] Weighted 2 nets. [ERROR GPL-0306] RePlAce diverged at wire/density gradient Sum. Error: or_replace.tcl, 120 GPL-0306 The-OpenROAD-Project/OpenLane