#789 OpenLane flow get stuck at yosys part "Continuing TECHMAP pass" New issue created by ufukyill Hi I was trying to run my verilog code which is about 2k rows through OpenLane in order to get a gds file. (Im using ubuntu 18.04 via virtualBox.) When i run the command : "/.flow.tcl -design top_level" the flow stucks at ,exact same step, "Continuing TECHMAP pass" on every try and the virtual machine does not responds in anyway. Screenshot of log file is attached below. (I was able to get a gds file when i ran flow for some modules seperately. Then i put together these modules in a .v file which is compiled and tested). The-OpenROAD-Project/OpenLane