GitHub (Legacy)
07/22/2020, 9:36 PM@mithro, @msaligane : To make this work right, all of the technology LEF files need to be updated to define MASTERSLICE entries for "nwell" and "pwell" layers. I can do this update in the .tlef files in skywater-src-nda branch "filtered" directory "tlef2". If that sounds okay to you, I will go ahead and do that and commit.
The other changes that need to be made (which may or may not be reflected in the source repos yet) are:
(1) All (digital standard cell library) LEF files (preferably in the original sources from which > everything else is derived) must move "VNB" from layer "li1" or "met1" and place it on layer "pwell". "VPB" must be moved from layer "li1" or "met1" and placed on layer "nwell". > This is the root cause of all the problems we've been having, because it is just dead wrong. Those pins do NOT exist on the metal layers, and putting them there just causes the tools to assume they are shorted to power and ground, which they are decidedly not.
(2) The technology lef files must have MASTERSLICE entries for "nwell" and "pwell".google/skywater-pdk