#122 Rework the tie cells in the PDK Issue opened by mithro It was pointed out in #113 that the LEF files don't have

TIELOW

and

TIEHIGH

cells in the LEF at the moment. The

conb

cell was potentially indicated as being a tie cell in #113 (comment) but it seems to connect to both

TIELOW

and

TIEHIGH

and LEF does not support the specification of both together. @RTimothyEdwards suggested in #113 (comment) that we could create two copies of the

conb

cell with one being marked as a

TIELOW

and one marked as

TIEHIGH

. @msaligane mentioned in #113 (comment)

@RTimothyEdwards It would really make sense to invest in making two new cells for the tie hi/lo. One other thing that really bothers me is the resistor used there. I would expect a pull-up / pull-down circuit. Something that looks like this: https://electronics.stackexchange.com/questions/195887/basic-tie-high-and-tie-low-circuits-in-digital-vlsi-design

As @rovinski mentioned, not a very conventional approach.

google/skywater-pdk