Tapeout - The Ultimate goal of VLSI engineer - Last 48 hrs Imagine yourself building the above in 2-days, from specifications to circuit to GDSII? Though it took us close to a year to tape-out PLL IP, but due to that experience, we were able to package this workshop for you in just 2-days, so that you can set a clear vision for your future in VLSI and semiconductors. Extremely effective for VLSI fresher, VLSI student and this workshop distinguishes you from other freshers who are looking for job. Google for the word "*VLSI Tape-out experience*" and you would know what I am talking about. The word tape-out is generally not very popular in academics as there are very less resources to teach VLSI tape-out Thanks to Google/Skywater/eFabless - this is now possible. So enroll for this jump start 2-day workshop on analog PLL design, from specifications to circuit design to layout to tape-out at an academic pricing of $25 for last 48hrs https://www.vlsisystemdesign.com/pll-design-using-sky130/ All the best and I will see you in workshop soon