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Jet Lan

02/14/2023, 5:57 AM
We plan to build Caravel test board with a socket on it. To purchase CSP socket for Caravel WLCSP package, we need to know the dimension, POD, of the WLCSP. For example package width, length, height. diameter of bump, spacing between bumps, bumps height, package edge to bumps. where I can I find the WLCSP package information?
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Tim Edwards

02/14/2023, 4:59 PM
The part is 3.68mm x 5.27mm x 0.92mm (height measured on daughterboard, so includes the bump height). The bumps are 350um diameter, spaced at 0.5mm pitch. The bump array is 6 x 10. The bump pattern and pinout can be found at: https://github.com/efabless/caravel_mpw-one/blob/master/docs/source/_static/bond_plan.svg Also see: https://github.com/efabless/caravel_mpw-one/blob/master/docs/source/_static/pcb_example_route_pattern.svg I'm not sure about the bump height itself. If you need the exact height of the chip and the height of the bump bonds, Jeff DiCorpo should have that information from Micross.
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Jet Lan

02/15/2023, 8:12 AM
Hi Tim, Thanks for your answer. Does daughterboard mean substrate or RDL? I found https://caravel-harness.readthedocs.io/en/latest/pinout.html that states size of package. Table 3 Package physical measurements Standard package WLCSP (bump bond) Package size 3.2 mm x 5.3 mm Bump pitch 0.5 mm The width is much smaller than 3.68mm. In https://groups.google.com/g/skywater-pdk-announce/c/xnyoBCC40c8?pli=1 I found the WLCSP package has two layers. It looks like 3.68mm is top side layer. 3.2 mm is bottom side layer. Am I right?
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Matt Venn

02/15/2023, 9:59 AM
@Jet Lan please let me know the price of the socket
and if it's a custom part, it might be worth asking the community if other people are interested in making a group purchase to get the price lower
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Tim Edwards

02/15/2023, 2:08 PM
@Jet Lan: The pinout document states the size of the chip, not the package. In WLCSP the package is the chip, but the chip is diced larger than the chip boundaries (the final package dimensions will include the saw street width minus the saw cut width). The measurements I gave to you were from measuring the actual packaged part with a caliper. By "daughterboard", I mean the board that we provide to users with the chip (and assorted decoupling capacitors) mounted on it. We have been giving the designers some number (five, maybe?) of parts assembled on daughterboards, and also the remaining bare dies. The daughterboard fits into the flexi-pin socket on the Caravel development board, but of course is not as good as a real test socket.
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Jet Lan

02/16/2023, 7:03 AM
Hi Tim, Since we want to build a WLCSP socket for Caravel chip. In order to prepare purchase order. The height of package is important. The 0.92mm was included thickness of daughterboard. right? Can you give me the thickness of daughterboard? Daughterboard is not necessary in socket. Another parameter of socket is acceptable pressure of WLCSP package in PSI. The specification of socket probe pin will be necessary for build a workable socket. Do you have any recommend?
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Tim Edwards

02/16/2023, 2:24 PM
No; to get the 0.92mm measurement, I measured the full height of the daughterboard + chip assembly, and then subtracted off the height of the daughterboard. You should post the question in the #mpw-two-silicon channel. Everybody who received boards from Efabless for testing got a bunch of unassembled dies. Somebody should be able to put a caliper on it and tell you what the height is. I happen to have only assembled parts on my desk, so I can't measure the height of the chip itself directly. For the pressure value, I have no idea.
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Matt Venn

02/16/2023, 4:47 PM
I just measured 1.00 mm with my calipers
so probably after soldering they get a bit lower as the balls melt
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Chris Clark

03/16/2023, 10:54 PM
@Jet Lan I'm also interested in building a socketed board for the WLCSP dies. Are you able to share what you found?