Hi Guys, I need your help. I would like to do the ...
# analog-design
r
Hi Guys, I need your help. I would like to do the stability analysis of this LDO. How can I do? I looked into old discussion, but in practical is still not clear. I break the feedback loop, I need to restore the impedance....
r
I already saw this link in previously discussion. When i apply the last method i get this results. The voltage source to break the loop are set in a correct way? If i delete the Vref source, i get something that can be correct, but i am not sure
Deleting the Vref source. In the picture on the website, the two voltage source has more value than mine, but i don't know the correct sintax. The measures are not plotted.
c
The essence of any loop analysis is never disturbing DC biasing. Therefore, your Vref has to have some DC value (from your bandgap) when you are doing the loop analysis. Also, assuming your EA is a simple diff pair, your LDO should be at least a two-pole system and the phase should go to 180 somewhere. Thus, I do not think any of your simulation results here are correct to me.
r
I agree with you, the only DC point are the two supply, the VIN=6v and VDD=3v. But I don't understand where I wronged.
c
From my experience, your EA and pass transistor should both tie to one VDD, and another DC source will be from your bandgap (Vref). Additionally, you are missing load current at the output which is crucial for your loop analysis (it will be pointless to take about loop stability without it). I personally tried three methods: Middlebrook, Tian, and Ochoa’s Z method and they all work pretty well for me. So I will say if your method is right then what you see is what you get. For sanity check, you can run some transient analysis and see if the output oscillates.
r
I adjusted the circuit, but still i get one plot a mirror of the other, and also the results are not plotted. I have no idea. suggestion? It is exactly the code and setup of the example.