Yatharth Agarwal
02/11/2023, 1:38 PMvoid set_registers()
{
reg_mprj_io_5 = GPIO_MODE_USER_STD_OUTPUT;
reg_mprj_io_6 = GPIO_MODE_USER_STD_OUTPUT;
}
void main()
{
reg_gpio_mode1 = 1;
reg_gpio_mode0 = 0;
reg_gpio_ien = 1;
reg_gpio_oe = 1;
set_registers();
gpio_config_io();
reg_gpio_out = 1; // OFF
reg_uart_enable = 0xff;
while (1)
{
reg_gpio_out = 0;
delay(1000000);
while (reg_uart_txfull == 1)
;
reg_uart_data = 0x61;
reg_gpio_out = 1;
delay(1000000);
}
}
on running this code both Tx and Rx remain pulled high on the logic analyser. Is there something that i am missing out? also is the configuration in set_registers()
correct?Tim Edwards
02/11/2023, 3:35 PMset_registers()
. GPIO[5] (Rx) should be set as GPIO_MODE_MGMT_STD_INPUT_NOPULL
, or else the management SoC will try to drive that line instead of getting input from it (technically, the setting should be MGMT
, not USER
, although only one bit of the setting is used to determine which direction the GPIO is communicating, so only INPUT
or OUTPUT
matters).
Maybe more importantly is to ask what is in your gpio_config_io.py
file. Are you setting channel 5 to management input and channel 6 to management output?Yatharth Agarwal
02/11/2023, 3:49 PMset_registers()
and gpio_config_io.py
and also MGMT
instead of USER
.
I still get the same results where both the lines are pulled high.
void set_registers()
{
reg_mprj_io_5 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; //Rx
reg_mprj_io_6 = GPIO_MODE_MGMT_STD_OUTPUT; //Tx
}
void main()
{
reg_gpio_mode1 = 1;
reg_gpio_mode0 = 0;
reg_gpio_ien = 1;
reg_gpio_oe = 1;
set_registers();
gpio_config_io();
reg_gpio_out = 1; // OFF
reg_uart_enable = 0xff;
while (1)
{
reg_gpio_out = 0;
delay(1000000);
while (reg_uart_txfull == 1)
;
reg_uart_data = 0x4f;
reg_gpio_out = 1;
delay(1000000);
}
}
Tim Edwards
02/11/2023, 3:53 PMC_MGMT_IN
and C_MGMT_OUT
in gpio_config_io.py
?Philipp Gühring
02/11/2023, 5:41 PMTim Edwards
02/11/2023, 6:10 PMPhilipp Gühring
02/11/2023, 6:12 PMMatt Venn
02/21/2023, 11:58 AMPhilipp Gühring
02/21/2023, 12:14 PMMatt Venn
02/21/2023, 4:37 PMproppy
03/16/2023, 1:34 AME7
and F7
(respectively mapped to mprj_io[5]
and mprj_io[6]
) seems to be connected to UART8
of the nucleo board, but I don't see it being defined in the micropython HAL: https://github.com/micropython/micropython/blob/05bb26010e4a466a82cfed179f8d8d0b406a78ca/ports/stm32/boards/NUCLEO_F746ZG/mpconfigboard.h#L32-L39IO[6]
-> PE0
-> machine.Pin('E0')