gatecat
02/06/2023, 11:33 AMslave.write([CARAVEL_REG_WRITE, 0x0e, 0x55])
print("pll readback: {:04x}".format(int.from_bytes(slave.exchange([CARAVEL_STREAM_READ, 0x0e], 1), 'big')))
slave.write([CARAVEL_REG_WRITE, 0x0e, 0xAA])
print("pll readback: {:04x}".format(int.from_bytes(slave.exchange([CARAVEL_STREAM_READ, 0x0e], 1), 'big')))
prints
pll readback: 00ab
pll readback: 0054
CARAVEL_STREAM_WRITE
instead of CARAVEL_REG_WRITE
, then the writes are totally ignoredTim Edwards
02/06/2023, 1:58 PM01
or 10
. That disables several things on-chip including the ability to run the digital locked-loop (although it can be either disabled or run in DCO mode). One way to get around this makes use of the fact that the housekeeping registers have two accesses, one through the SPI and one through wishbone. So most of the registers can be programmed through compiled C code running on the SPI flash. But. . . there was another error where a portion of the registers (including the DLL controls) are in an address range that was not decoded by the processor, and so can't be reached through the wishbone bus.gatecat
02/06/2023, 2:00 PMTim Edwards
02/06/2023, 2:04 PM