I have an interesting problem with C4 1 the GPIO config was open-source-silicon.dev #mpw-2-silicon

I have an interesting problem with C4-1, the GPIO ...

Philipp Gühring

02/05/2023, 12:40 AM

I have an interesting problem with C4-1, the GPIO config was running properly before, but now I only get Winbond SRAM not found and the whole Nucleo board draws 100mA more with C4-1 than with any other of my C4 chips, so it seems that this chip has developed a short-circuit internally that wasn't there before. Has anyone else experienced a dying Caravel?

Tim Edwards

02/05/2023, 9:36 PM

I think @Matthew Guthaus may have experienced that, based on his description.

Tim Edwards

02/05/2023, 9:39 PM

It is more indicative of a latch-up issue than a "dying" chip. If there's a possibility that something in the user project area might latch up, then you will probably want to separate

vccd1

(the user area power supply) from the

1V8

net on the development board. There is a jumper

J3

on the right-hand side of the board, which is a 2-pin header. It has a wire between the two pins. Cut the wire with a knife and install a two-pin header. Then connect

vccd1

(the pin on the left) to ground to keep the user project area powered down while the calibration test runs.

Matthew Guthaus

02/06/2023, 5:25 PM

I haven't really seen different behavior as I test. It just doesn't work consistently. 🙂

Philipp Gühring

02/08/2023, 7:59 PM

I have cut the connection, soldered on a two-pin header, connected the left pin to ground, but the calibration does not run for my C4-1 chip.

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