Does anyone have any idea what is wrong?
# analog-designs
Stanley Lin
02/03/2023, 10:06 PMDoes anyone have any idea what is wrong?
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Stefan Schippers
02/04/2023, 12:25 AMI have tried to do the following:
first of all i have set very high precision flags:
.option ABSTOL=1e-14 GMIN=1e-14 RELTOL=1e-5 VNTOL=1e-8vipdc vip 0 3.3 0.1write op.rawset appendwritedc vip 3.3 0 -0.1write op.rawv(out)s
Stanley Lin
02/04/2023, 12:28 AMOh I see. Actually my output is a high impedance output stage of a general BJT op amp. I thought the output voltage could be determined by the two BJTs even though this is a high impedance node. Maybe in gf180 model, the vout couldn't be just determined by the BJT's operating point
Stanley Lin
02/04/2023, 12:29 AMI will make some experiments, hopefully I can find out what happens to my circuit
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Stefan Schippers
02/04/2023, 12:29 AMyou can add a high resistor from out to gnd, like 100MOhm. This will probably remove indetermination.
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Stanley Lin
02/04/2023, 12:30 AMOh okay
Stanley Lin
02/04/2023, 12:30 AMThank you for your advice
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Stefan Schippers
02/04/2023, 12:30 AMps: use 100MEG not 100M in spice (100M is 100 milliohm) !
Stefan Schippers
02/04/2023, 12:32 AMthe resistor doesn't seem to fix the issue....
Stefan Schippers
02/04/2023, 12:32 AMcan you attach the .sch file(s)?
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Stanley Lin
02/04/2023, 12:32 AMYes
Stanley Lin
02/04/2023, 12:41 AMBJTamp.sch
Stanley Lin
02/04/2023, 12:42 AMbtw what is the different between 100MEG and 100M? I thought both of them stand for 100*10e6
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Stefan Schippers
02/04/2023, 12:56 AMno, m stands for "milli", 1e-3. Since spice is case insesitive 1mF and 1MF both refer to 1 milli Farad
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Stanley Lin
02/04/2023, 12:57 AMOh yeah I see
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Stefan Schippers
02/04/2023, 12:59 AMI found a serious issue in the design. You need to edit the npn symbol and change the name of the substrate pin to S, it is set to 'B'. This creates a substrate to base short.
Stefan Schippers
02/04/2023, 12:59 AMthis is not your fault this must be notified upstream
Stefan Schippers
02/04/2023, 1:00 AMin the fg180 pdk maintainers
Stefan Schippers
02/04/2023, 1:00 AMbut the fix is easy. descend into the symbol, select the small red square , press 'q' and change name=B to name=S
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Stefan Schippers
02/04/2023, 1:10 AMI also don't know if the S node of the transistor must be connected to the emitter or to AVSS
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Stanley Lin
02/04/2023, 1:12 AMActually I have changed the terminal from B to S before since the simulation will fail if that isn't changed
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Stefan Schippers
02/04/2023, 1:14 AMyes i have seen, however this change must be done. It is not changing the behavior though
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Stanley Lin
02/04/2023, 1:15 AMYeah
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Stefan Schippers
02/04/2023, 1:23 AMI can't understand the biasing of the output stage. You have 2x1k resistors and 2 diodes. As a result Vbe of output bipolars is ~0.9V these transistors are in super ON state and you have 40mA flowing from AV33 to AVSS.
Stefan Schippers
02/04/2023, 1:23 AM1.png
Stefan Schippers
02/04/2023, 1:26 AMthe diodes themselves are carrying 30mA of current. The differential stage can add/subtract some mA, but this is largely insufficient to drive the outputs.
Stefan Schippers
02/04/2023, 1:29 AMIf you want a push pull stage you must swap pnp and npn output transistors
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Stanley Lin
02/04/2023, 1:30 AMζͺε 2023-02-03 δΈε8.30.03.png
Stanley Lin
02/04/2023, 1:30 AMActually I think you get the correct operating point which is consistent with dc simulation
Stanley Lin
02/04/2023, 1:30 AMThis is the result of my op simulation
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Stefan Schippers
02/04/2023, 1:33 AMI have changed the ouput stage to push pull and get abetter transfer function:
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Stanley Lin
02/04/2023, 1:35 AMCould you send me this .sch file?
Stanley Lin
02/04/2023, 1:35 AMI'll spend sometime digging into it
Stanley Lin
02/04/2023, 1:36 AMTo be honest I am not quite familiar with the BJT design
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Stefan Schippers
02/04/2023, 1:36 AMyes i will send it. Anyway i still see mismatch between the op and dc sims... This is probably an issue with the BJT spice models, not with the simulator itself...
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Stanley Lin
02/04/2023, 1:37 AMHowever it seems that you didn't have that inconsistency issue in you previous screenshot
Stanley Lin
02/04/2023, 1:38 AMimage.png
Stanley Lin
02/04/2023, 1:38 AMThis one
Stanley Lin
02/04/2023, 1:38 AMIs it under op simulation?
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Stefan Schippers
02/04/2023, 1:47 AMno image above was one dc point, dont' remember exactly what vip value... You can backannotate any point in a dc sim, it is explained in this video.
The schematic with output transformed to push pull:
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Stanley Lin
02/04/2023, 1:48 AMOkay, thank you so much!
Stanley Lin
02/04/2023, 1:48 AMThis is very helpful
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