Dear all, I wanted to ask if someone has seen this kind of behaviour when characterizing MOSFET On Resistance (multiplicity = 112 or multiplicity = 100). This is happening, as far as I know, with the 5.0V/10.5V NMOS transistor from sky130 (g5v0d10v5). The PMOS transistor at this values hasn't presented this problems.

Try varying VDS instead of current. Later, plot VDS as function of the current from the source

Smaller transistors (m=4, 24, ...) are in saturation. Channel limits the current so you see extremely high Vds and high Ron resistance. As the transistor gets bigger you see Vds drops to lower levels and transistor enters linear region. The biggest transistors are in linear region at all plotted current levels and show low Vds. Anyway do not force a current at the drain, force a Vds voltage and plot the drain current. The curves at Vds=14V are well outside the device maximum Vds rating and are not realistic. Spice models are valid only within the device allowed operating range.

Thank you @Luis Henrique Rodovalho @Stefan Schippers! Now I understand much better 😄