Hello everyone, could anyone confirm me if openROAD when doing global routing, it adds by itself the pins and the vias

viali

(local interconnect <-> metal 1) over the available

li

area on each standard cell? (fig 1) I'm asking this because I was designing some cells but I was adding by myself the pins in the metal layer (fig 2) (obs: this cell was to find the Wpmax and Wnmin respecting DRC)

gr will create a guide that goes the pin. It is the detailed router that will actually put in the via. It can connect to li1 pins as that is what most skywater std cells use.

If you add your own

viali

and

metal1

to your standard cell layout, OpenROAD should be able to handle the routing if you are not blocking resources (e.g., by putting a via between route tracks where it interferes with multiple metal1 tracks). You will need to have both layers represented in the LEF view of the standard cell read and used by OpenROAD.

@Matt Liberty I still don't know how to build them.

I don't know of any open source solution which is why I was asking your plans

I want to check lctime, but first I need to finish the layout of some cell because this is part of a college project (I'm fighting against time).

I haven't looked at that one. It would be interesting to hear how it goes if you try it

Sure 👍🏼